? bootstrap-mdvh-debian
? usrp-build
? usrp.prj
? usrp.pws
Index: firmware/include/fpga_regs_common.h
===================================================================
RCS file: /cvsroot/opensdr/usrp/firmware/include/fpga_regs_common.h,v
retrieving revision 1.5
diff -u -b -B -r1.5 fpga_regs_common.h
--- firmware/include/fpga_regs_common.h	20 Jul 2005 16:46:07 -0000	1.5
+++ firmware/include/fpga_regs_common.h	24 Aug 2005 22:39:57 -0000
@@ -66,6 +66,7 @@
 #  define  bmFR_MODE_NORMAL		      0
 #  define  bmFR_MODE_LOOPBACK		(1 << 0)	// enable digital loopback
 #  define  bmFR_MODE_RX_COUNTING	(1 << 1)	// Rx is counting
+#  define  bmFR_MODE_TRUNC_TO_8BIT	(1 << 2)	// Rx is truncated to most significant 8 bits
 
 
 // If the corresponding bit is set, internal FPGA debug circuitry
Index: fpga/sdr_lib/rx_buffer.v
===================================================================
RCS file: /cvsroot/opensdr/usrp/fpga/sdr_lib/rx_buffer.v,v
retrieving revision 1.19
diff -u -b -B -r1.19 rx_buffer.v
--- fpga/sdr_lib/rx_buffer.v	14 Aug 2004 22:33:36 -0000	1.19
+++ fpga/sdr_lib/rx_buffer.v	24 Aug 2005 22:39:58 -0000
@@ -43,6 +43,7 @@
     input rxclk,
     input rxstrobe,
     input clear_status,
+    input trunc_to_8bit,
     output [15:0] debugbus
     );
 
@@ -80,10 +81,33 @@
        store_next <= #1 4'd1;
      else if(~rx_full & (store_next == channels))
        store_next <= #1 4'd0;
+     else if(~rx_full & trunc_to_8bit &(store_next == (channels>>1))) //This works only for the 8 bit case if the number of channels is even
+       store_next <= #1 4'd0;
      else if(~rx_full & (store_next != 0))
        store_next <= #1 store_next + 4'd1;
 
    always @*
+     if(trunc_to_8bit)
+       case(store_next)
+         4'd1 : begin
+                  fifodata[7:0] = ch_0[15:8];
+                  fifodata[15:8] = ch_1[15:8];
+                end                  
+         4'd2 : begin
+                  fifodata[7:0] = ch_2[15:8];
+                  fifodata[15:8] = ch_3[15:8];
+                end
+         4'd3 : begin
+                  fifodata[7:0] = ch_4[15:8];
+                  fifodata[15:8] = ch_5[15:8];
+                end
+         4'd4 : begin
+                  fifodata[7:0] = ch_6[15:8];
+                  fifodata[15:8] = ch_7[15:8];
+                end
+         default : fifodata = 16'hFFFF;
+       endcase // case(store_next)     
+     else //if(trunc_to_8bit)
      case(store_next)
        4'd1 : fifodata = ch_0;
        4'd2 : fifodata = ch_1;
Index: fpga/toplevel/usrp_std/usrp_std.v
===================================================================
RCS file: /cvsroot/opensdr/usrp/fpga/toplevel/usrp_std/usrp_std.v,v
retrieving revision 1.15
diff -u -b -B -r1.15 usrp_std.v
--- fpga/toplevel/usrp_std/usrp_std.v	22 Aug 2005 07:55:24 -0000	1.15
+++ fpga/toplevel/usrp_std/usrp_std.v	24 Aug 2005 22:39:58 -0000
@@ -181,6 +181,7 @@
    
    wire loopback = settings[0];
    wire counter = settings[1];
+   wire trunc_to_8bit = settings[2];
 
    always @(posedge clk64)
      if(rx_dsp_reset)
@@ -225,6 +226,7 @@
        .ch_6(ch6rx),.ch_7(ch7rx),
        .rxclk(clk64),.rxstrobe(strobe_decim),
        .clear_status(clear_status),
+       .trunc_to_8bit(trunc_to_8bit),
        .debugbus(rx_debugbus) );
    
    rx_chain #(`FR_RX_FREQ_0,`FR_RX_PHASE_0) rx_chain_0
Index: host/apps/test_usrp_standard_rx.cc
===================================================================
RCS file: /cvsroot/opensdr/usrp/host/apps/test_usrp_standard_rx.cc,v
retrieving revision 1.11
diff -u -b -B -r1.11 test_usrp_standard_rx.cc
--- host/apps/test_usrp_standard_rx.cc	19 May 2005 02:23:36 -0000	1.11
+++ host/apps/test_usrp_standard_rx.cc	24 Aug 2005 22:39:58 -0000
@@ -53,11 +53,12 @@
 static void
 usage ()
 {
-  fprintf (stderr, "usage: %s [-f] [-v] [-l] [-c] [-D <decim>] [-F freq] [-o output_file]\n", prog_name);
+  fprintf (stderr, "usage: %s [-f] [-v] [-l] [-c] [-8] [-D <decim>] [-F freq] [-o output_file]\n", prog_name);
   fprintf (stderr, "  [-f] loop forever\n");
   fprintf (stderr, "  [-v] verbose\n");
   fprintf (stderr, "  [-l] digital loopback in FPGA\n");
   fprintf (stderr, "  [-c] counting in FPGA\n");
+  fprintf (stderr, "  [-8] output only 8 bits samples (MSB)\n");
   exit (1);
 }
 
@@ -75,6 +76,7 @@
   bool	forever_p = false;
   bool	loopback_p = false;
   bool  counting_p = false;
+  bool  trunc_to_8bit_p = false;
   int	ch;
   char	*output_filename = 0;
   int	which_board = 0;
@@ -83,7 +85,7 @@
 
   set_progname (argv[0]);
 
-  while ((ch = getopt (argc, argv, "fvlco:D:F:")) != EOF){
+  while ((ch = getopt (argc, argv, "fvlco:8:D:F:")) != EOF){
     switch (ch){
     case 'f':
       forever_p = true;
@@ -113,6 +115,8 @@
       center_freq = strtod (optarg, 0);
       break;
 
+	case '8':
+	  trunc_to_8bit_p = true;
     default:
       usage ();
     }
@@ -132,6 +136,8 @@
     mode |= usrp_standard_rx::FPGA_MODE_LOOPBACK;
   if (counting_p)
     mode |= usrp_standard_rx::FPGA_MODE_COUNTING;
+  if(trunc_to_8bit_p)
+	mode |= usrp_standard_rx::FPGA_MODE_TRUNC_TO_8BIT;
 
 
   usrp_standard_rx *urx = usrp_standard_rx::make (which_board, decim, 1, -1, mode);
Index: host/lib/usrp_standard.cc
===================================================================
RCS file: /cvsroot/opensdr/usrp/host/lib/usrp_standard.cc,v
retrieving revision 1.22
diff -u -b -B -r1.22 usrp_standard.cc
--- host/lib/usrp_standard.cc	12 Aug 2005 20:38:15 -0000	1.22
+++ host/lib/usrp_standard.cc	24 Aug 2005 22:39:59 -0000
@@ -193,8 +193,10 @@
   }
 
   d_decim_rate = rate;
+  int nbytes_per_chan;
+  nbytes_per_chan=(mode() & FPGA_MODE_TRUNC_TO_8BIT)?sizeof(char):sizeof(short);
   set_usb_data_rate ((adc_freq () / rate * nchannels ())
-		     * (2 * sizeof (short)));
+		     * (2 * nbytes_per_chan));
 
   bool s = disable_rx ();
   bool ok = _write_fpga_reg (FR_DECIM_RATE, d_decim_rate - 1);
@@ -331,6 +333,9 @@
 int
 usrp_standard_rx::mux () const { return d_sw_mux; }
 
+int
+usrp_standard_rx::mode () const { return d_mode; }
+
 double 
 usrp_standard_rx::rx_freq (int channel) const
 {
@@ -343,6 +348,7 @@
 bool
 usrp_standard_rx::set_fpga_mode (int mode)
 {
+  d_mode=mode;
   return _write_fpga_reg (FR_MODE, mode);
 }
 
Index: host/lib/usrp_standard.h
===================================================================
RCS file: /cvsroot/opensdr/usrp/host/lib/usrp_standard.h,v
retrieving revision 1.14
diff -u -b -B -r1.14 usrp_standard.h
--- host/lib/usrp_standard.h	20 Jul 2005 05:34:26 -0000	1.14
+++ host/lib/usrp_standard.h	24 Aug 2005 22:39:59 -0000
@@ -38,6 +38,7 @@
   int			d_nchan;
   int			d_sw_mux;
   int			d_hw_mux;
+  int           d_mode;
   double		d_rx_freq[MAX_CHAN];
 
  protected:
@@ -57,7 +58,8 @@
   enum {
     FPGA_MODE_NORMAL     = 0x00,
     FPGA_MODE_LOOPBACK   = 0x01,
-    FPGA_MODE_COUNTING   = 0x02
+    FPGA_MODE_COUNTING   = 0x02,
+    FPGA_MODE_TRUNC_TO_8BIT   = 0x04
   };
 
   ~usrp_standard_rx ();
@@ -145,6 +147,7 @@
   double rx_freq (int channel) const;
   int nchannels () const;
   int mux () const;
+  int mode () const;
 
   // called in base class to derived class order
   bool start ();

